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LE25U20AMB
8. Chip Erase
Chip erase is an operation that sets the memory cell data in all the sectors to "1". "Figure 14 Chip Erase" shows the
timing waveforms, and Figure 21 shows a chip erase flowchart. The chip erase command consists only of the first bus
cycle, and it is initiated by inputting (C7h). After the command has been input, the internal erase operation starts from
the rising CS edge, and it ends automatically by the control exercised by the internal timer. Erase end can also be
detected using status register RDY.
Figure 14 Chip Erase
Self-timed
Erase Cycle
tCHE
CS
Mode3
0 1 2 3 4 5 6 7
SCK
Mode0
8CLK
SI
SO
C7h
High Impedance
9. Page Program
Page program is an operation that programs any number of bytes from 1 to 256 bytes within the same sector page (page
addresses: A17 to A8). Before initiating page program, the data on the page concerned must be erased using small
sector erase, sector erase, or chip erase. "Figure 15 Page Program" shows the page program timing waveforms, and
Figure 22 shows a page program flowchart. After the falling CS, edge, the command (02H) is input followed by the
24-bit addresses. Addresses A17 to A0 are valid. The program data is then loaded at each rising clock edge until the
rising CS edge, and data loading is continued until the rising CS edge. If the data loaded has exceeded 256 bytes, the
256 bytes loaded last are programmed. Th e program data must be loaded in 1-byte increments, and the program
operation is not performed at the rising CS edge occurring at any other timing. The page program time is 2.0ms (typ.)
when 256 bytes (1 page) are programmed at one time.
Figure 15 Page Program
Self-timed
Program Cycle
tPP
CS
Mode3
0 1 2 3 4 5 6 7 8
15 16
23 24
31 32
39 40
47
2079
SCK
Mode0
8CLK
SI
02h
Add.
Add.
Add.
PD
PD
PD
SO
High Impedance
No.A2097-12/21
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